An inductively coupled plasma (ICP) of SF6 and Ar is used to physically etch the exceeding silicon and separate the nanowires which began to merge. After this step, nanowires are all individualized and come up to the AAO surface (Figure 2c). The growth template is eventually etched in HF (1% aqueous solution) to free the silicon nanowire array (Figure 2d). Figure 2e shows that nanowires are well individualized with a diameter of around 70 nm following a sharp distribution. The increased roughness and conical shape at the bottom of the nanowires
is reflecting the shape of the nanopores close to the interface with the substrate (Figure 2f). Figure 2 Scanning electron microscopy image of a silicon nanowire array planarization. (a) After growth, the AAO template is filled with silicon nanowires which grew out of it. (b) Selleck Thiazovivin Sonication of the sample breaks the outer nanowires revealing the post-growth AAO surface. (c) I-KI gold etching and ICP silicon etching leads to the planarization of the nanowire array. (d) Cross section showing the ‘top-down like’ nanowire array with a very good homogeneity of length and high density after alumina removal by HF etching. (e) Close view of the interface between the Si (100) substrate and the individualized ARRY-438162 nanowires. (f) Empty AAO template before gold catalyst electrodeposition, complementary to the geometry of (e). Structural characterizations were carried out using a Zeiss Ultra 55 SEM (Carl Zeiss,
BCKDHB Inc., Oberkochen, Germany) and a Jeol 3010 transmission electron microscope (TEM, JEOL Ltd., Akishima-shi, Japan). Grazing incidence X-ray diffraction (GIXD) was performed at the BM2-D2AM beamline of the European Synchrotron Radiation Facility (ESRF), Grenoble, France. Reflectivity measurements were carried out with a homemade optical setup. Results and discussion SEM pictures of Figure 2 clearly show the
very high density of individualized nanowires. Based on the number of nanowires counted on SEM images, we estimate the density to around 8×109 nanowires cm−2 for a sample in which growth template was made at 40 V. It is also clear that nanowires were guided in the nanopores during their growth as revealed by the roughness of their surface: the morphology of the nanopores’ sidewalls was transferred to the growing nanowires which were thoroughly filling them (Figure 2e,f). The combination of standard microelectronics processes with the confined VLS growth of silicon nanowires therefore enabled the production of arrays of nanowires presenting similar features than with top-down techniques: their density is very high and every single nanowire is well individualized. GIXD on these high-density silicon nanowire arrays was performed in the light of synchrotron radiation at an check details energy E = 10.8 keV (λ = 0.1148 nm) in order to verify the nanowire crystalline quality and orientation. Figure 3 displays a θ-2θ diffraction pattern acquired near the (−440) reflection of the silicon substrate at q = 5.